1. Field of the Invention
This invention relates to electronic components such as semiconductor devices, multilayer ceramic structures and multilayer thin film structures having copper conductor lines and vias within the component and, more particularly, to lined copper conductor lines and vias having increased electromigration and operating lifetime.
2. Description of Related Art
Electronic components are used throughout industry and basically use metal conductor lines to form circuits in the component. It is essential that the metal conductor lines have a long life without failure by metal voiding in the line due to electromigration, stress voiding or missing copper defects. For convenience the following will be directed to copper conductor lines and vias in thin film multilayer structures having interconnected circuitry and will be applicable to all low resistance conductors including AL, Ag, Au, Cu, etc. and alloys thereof.
Multilayer electronic components offer an attractive packaging solution for high performance systems such as in computer, telecommunications, military and consumer applications. These electronic components offer high density interconnections and the ability to provide increased circuitry for a given electronic component size.
Multilayer thin film electronic components have evolved to the use of copper as the wiring material and polyimide as the dielectric or insulator. As this has evolved, damascene has become the wiring method of choice. Damascene construction refers to the depositing of an insulation or dielectric, etching a groove or trench to form the wiring structure, depositing barrier metals and copper over the insulation structure to fill the groove and then chemical-mechanical polishing the copper so it is coplanar with the dielectric.
An important aspect of multilayer electronic components is the via or openings between layers in which a conductive material is applied to provide electrical contact between the metallization on different layers. Broadly stated, the typical multilayer electronic component is built up from a number of layers of a dielectric material layer such as silicon oxide, fluorinated silicon oxide, polymers including polyimide and fluorinated polyimide, polyarylene ether, SiCxOyH2, ceramics, carbon and other dielectric materials. In the processing sequence known in the art as the xe2x80x9cDamascene Processxe2x80x9d, the dielectric layer is patterned using known techniques such as the use of a photoresist material which is exposed to define the wiring pattern. After developing, the photoresist acts as a mask through which a pattern of the dielectric material is removed by a subtractive etch process such as plasma etching or reactive ion etching. This is generally termed a lithography or photolithography process and may be used for both additive or subtractive metallization procedures as is known in the art. Using the Damascene Process, openings defining wiring patterns are provided in the dielectric layer, extending from one surface of the dielectric layer to the other surface of the dielectric layer. These wiring patterns are then filled with a thin PVD or CVD metal, such as a Ti or Ta based metal or nitridized metal. Next, a thin seed layer such as PVD or CVD copper is deposited followed by a thicker Cu deposition by electroplating, electroless plating, chemical vapor deposition, physical vapor deposition or a combination of methods. This process may include planarization of the metal by removing excess material with a method such as chemical mechanical polishing.
In the Single Damascene Process, vias or openings are provided in the dielectric layer and filled with metallization to provide electrical contact between layers of wiring levels. In the Dual Damascene Process, the via openings and the wiring pattern openings are both provided in the dielectric layer before filling with metallization. This process simplifies the procedure and eliminates some internal interfaces. These procedures are continued for each layer in the electronic component until the electronic component is completed.
In FIG. 3B, a typical dual Damascene line of the prior art is shown. Dielectric layers 11a and 11b having horizontal dielectric barrier layers 16 thereon are shown comprising metallization 12 in dielectric layer 11b and metallization 12a and stud 14 in dielectric layer 11a. The stud 14 and metallization 12a are shown encased by a conducting diffusion barrier liner 15. A single Damascene line structure of the prior art is shown in FIG. 2B.
The dielectric material provides electrical insulation and electrical isolation between the copper wiring elements. To avoid metal diffusion between the metal and the dielectric, conductive barrier layers, also referred to as liners, and dielectric barrier layers are included in the structure to contain the copper or other metal and to provide improved adhesion of the copper lines to the dielectric or other metallization.
The barrier layer typically consists of a single or combination of refractory metals from the family of Ti, W and Ta and nitrides such as TaN, WN and TiN and provides a barrier to the diffusion of copper metal between the metal line and the dielectric. Typically, the barrier layer is formed between the dielectric layers and in the line and via on both sidewalls and at the base thereof to form the barrier layer. It has been found however, that when lined copper conductor lines and/or vias (including single and dual Damascene lines) have areas of missing or partially missing copper due to inclusions from the plating process used to fabricate the lines, missing copper seed layer or voided copper due to electromigration stress voiding or defects, the current must be carried by the liner which can cause fails as noted above.
Bearing in mind the problems and deficiencies of the prior art, it is therefore an object of the present invention to provide electronic components having copper conductor lines and vias with increased operating and electromigration life including multilayer electronic components having Damascene lines made using a single Damascene process or a dual Damascene process.
It is another object of the present invention to provide a method for making copper conductor lines and vias with increased operating and electromigration life including multilayer electronic components having Damascene lines made using a single Damascene process or a dual Damascene process.
Still other objects and advantages of the invention will in part be obvious and will in part be apparent from the specification.
The above and other objects, which will be apparent to one of skill in the art, are achieved in the present invention which relates in one aspect to a copper conductor metal line or via including Damascene metal lines having high electromigration resistance and operating life comprising:
an insulator or dielectric having an opening therein in the form of metal lines, vias and/or Damascene lines;
a first adhesion promoting conductive barrier layer liner material in the opening, e.g., on the walls and base of the opening;
a first conductive layer on the first adhesion promoting conductive barrier layer liner material layer having a predetermined cross-sectional area said first conductive layer having electromigration resistance;
a second adhesion promoting conductive barrier liner layer on the first conductive layer; and
a soft low resistance central core of metal preferably copper forming the line or via. A multilayer electronic component having interconnected metallization including copper lines, vias and/or Damascene lines, the electronic component having high electromagnetic resistance and operating life comprising:
an insulator or dielectric having an opening therein in the form of metal lines, vias and/or Damascene lines;
a first adhesion promoting conductive barrier liner material layer in the opening, e.g., on the walls and base of the opening;
a first conductive layer on the first adhesion promoting conductive barrier layer liner material layer having a predetermined cross-sectional area said first conductive layer having electromigration resistance;
a second adhesion promoting conductive barrier liner layer on the first conductive layer; and
a soft low resistance central core of metal preferably copper forming the line or via.
In a further aspect of the invention a method is provided for making a copper conductor line, via and/or Damascene line having high electromigration resistance and operating life comprising:
forming an insulator or dielectric on a substrate;
forming an opening in the form of metal lines, vias and/or Damascene lines in the insulator;
applying a first adhesion promoting conductive barrier liner material layer in the opening, e.g., on the walls and base of the opening;
applying a first conductive layer on the first adhesion promoting conductive barrier layer liner material layer, the first conductive layer having a predetermined cross-sectional area and having electromigration resistance;
forming a second adhesion promoting conductive barrier liner layer on the first conductive layer; and
applying a soft low resistance metal preferably copper on the second adhesion promoting conductive barrier layer filling the opening forming the line or via.
A method is provided for making a multilayer electronic component having copper conductor lines, vias and/or Damascene metal lines with high electromigration resistance comprising:
forming the multilayer electronic component layer by layer with dielectric layers;
forming openings in the dielectric layer in the form of lines, vias and/or Damascene metal lines;
applying a first adhesion promoting conductive barrier layer liner material layer in the opening, e.g.,on the walls and base of the openings;
applying a first conductive layer on the first adhesion promoting conductive barrier layer liner material layer, the first conductive layer having a predetermined cross-sectional area and having electromigration resistance;
applying a second adhesion promoting conductor barrier liner layer on the first conductive layer; and
applying a soft low resistance metal preferably copper filling the opening and forming the line or via.
Electronic components made using the method of the invention are also provided.